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DS1922L/DS1922T

iButton Temperature Loggers

with 8KB Data-Log Memory

Initialization

All transactions on the 1-Wire bus begin with an initializa-

tion sequence. The initialization sequence consists of a

reset pulse transmitted by the bus master followed by

presence pulse(s) transmitted by the slave(s). The pres-

ence pulse lets the bus master know that the

DS1922L/DS1922T are on the bus and are ready to oper-

ate. For more details, see the 1-Wire Signaling section.

1-Wire ROM Function Commands

Once the bus master has detected a presence, it can

issue one of the eight ROM function commands that

DS1922L/DS1922T support. All ROM function com-

mands are 8 bits long. A list of these commands follows

(see the flowchart in Figure 11).

Read ROM [33h]

This command allows the bus master to read the

DS1922L/DS1922T’s 8-bit family code, unique 48-bit

serial number, and 8-bit CRC. This command can only

be used if there is a single slave on the bus. If more

than one slave is present on the bus, a data collision

occurs when all slaves try to transmit at the same time

(open drain produces a wired-AND result). The resul-

tant family code and 48-bit serial number results in a

mismatch of the CRC.

Match ROM [55h]

The Match ROM command, followed by a 64-bit ROM

sequence, allows the bus master to address a specific

DS1922L/DS1922T on a multidrop bus. Only the

DS1922L/DS1922T that exactly matches the 64-bit

ROM sequence responds to the following memory func-

tion command. All other slaves wait for a reset pulse.

This command can be used with a single device or

multiple devices on the bus.

Search ROM [F0h]

When a system is initially brought up, the bus master

might not know the number of devices on the 1-Wire

bus or their registration numbers. By taking advantage

of the wired-AND property of the bus, the master can

Maxim Integrated

use a process of elimination to identify the registration

numbers of all slave devices. For each bit of the regis-

tration number, starting with the least significant bit, the

bus master issues a triplet of time slots. On the first slot,

each slave device participating in the search outputs

the true value of its registration number bit. On the sec-

ond slot, each slave device participating in the search

outputs the complemented value of its registration num-

ber bit. On the third slot, the master writes the true

value of the bit to be selected. All slave devices that do

not match the bit written by the master stop participat-

ing in the search. If both of the read bits are zero, the

master knows that slave devices exist with both states

of the bit. By choosing which state to write, the bus

master branches in the ROM code tree. After one com-

plete pass, the bus master knows the registration num-

ber of a single device. Additional passes identify the

registration numbers of the remaining devices. Refer to

Application Note 187: 1-Wire Search Algorithm for a

detailed discussion, including an example.

Conditional Search ROM [ECh]

The Conditional Search ROM command operates simi-

larly to the Search ROM command except that only

those devices that fulfill certain conditions participate in

the search. This function provides an efficient means

for the bus master to identify devices on a multidrop

system that have to signal an important event. After

each pass of the conditional search that successfully

determined the 64-bit ROM code for a specific device

on the multidrop bus, that particular device can be indi-

vidually accessed as if a Match ROM had been issued,

since all other devices have dropped out of the search

process and are waiting for a reset pulse.

The DS1922L/DS1922T respond to the conditional search

ROM command if one of the three alarm flags of the Alarm

Status register (address 0214h) reads 1. The temperature

alarm only occurs if enabled (see the Temperature Sensor

Alarm section). The BOR alarm is always enabled. The

first alarm that occurs makes the device respond to the

Conditional Search ROM command.

37

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